alphachip.ru
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Digital & I/O Libraries
Development of standard cell libraries and I/O cells
IP design
DDRs, USBs, PLLs and other IP blocks including radiation hardened
Memory Circuits
One- and two-port synchronous SRAM and mask ROMs, including radiation hardened, one-time programmable ROMs and EEPROMs for bulk silicon and SOI technologies, including radiation hardened
Silicon Validation (Test Chips)
Silicon validation of memory compilers, libraries and IP blocks
Basic Tehnologies
SOI (nm) - 250, 180, 90, 22 (on fully depleted silicon)CMOS (nm) - 350, 250, 180, 150, 110, 90, 65, 55, 45, 28